Dr. Syed Asad Alam
- Assistant Professor
- Department of Electrical Engineering
- Namal College 30 Km Talagang Road, Mianwali, 42250, Pakistan
- Office: +92 459 236 995 Ext: 161
- Mobile: +92 323 237 29 27
- Around 8 years experience in architecture design, implementation and verification of digital systems comprising digital signal processing and communication systems.
- Includes 5 years experience in Research focusing on optimization, analysis, mapping, architecture design and implementation of various digital signal processing algorithms on FPGAs and ASICs
- Includes 5 years experience as a teaching assistant, conducting lectures, supervision of lab session and project groups in various subjects of Digital Electronics and supervision of Master’s Thesis students
- In depth knowledge of FPGA, Synthesis, Timing Analysis and RTL Design
- Tools: Matlab, Design Compiler, Xilinx Synthesis and Place-and-Route Tool, Mentor Graphics Precision, Simulink, Gurobi Optimizer
- Languages: Verilog HDL, VHDL, System Verilog, Python
- Syed Asad Alam and Oscar Gustafsson,”Design of Finite Word Length Linear-Phase FIR Filters in the Logarithmic Number System Domain,” VLSI Design, vol. 2014, Article ID 217495, 14 pages, 2014.
- Syed Asad Alam and Oscar Gustafsson,”On the Implementation of Time-Multiplexed Frequency-Response Masking Filters,” IEEE Transactions on Signal Processing, vol. 64, no. 15, pp. 3933-3944, Aug. 2016
- Syed Asad Alam and Oscar Gustafsson,”Implementation of narrow-band frequency-response masking for efficient narrow transition band FIR filters on FPGAs,” in Proc. NORCHIP, Lund, Sweden, Nov. 2011.
- Syed Asad Alam and Oscar Gustafsson,”Implementation of time-multiplexed sparse periodic FIR filters for FRM on FPGAs,” in Proc. IEEE Int. Symp. Circuits Syst. (ISCAS), Rio de Janeiro, Brazil, May 2011.
- Syed Asad Alam and Oscar Gustafsson,”Generalized division-free architecture and compact memory structure for resampling in particle filters,” in Proc. European Conf. on Circuit Theory and Design (ECCTD), Trondheim, Norway, Aug. 2015.
- Fahad Qureshi, Syed Asad Alam and Oscar Gustafsson,”4k-point FFT algorithms based on optimized twiddle factor multiplication for FPGAs,” in Proc. Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics, Shanghai, China, 2010
- I am a reviewer for the following journal(s) and conference(s)
- Circuits, Systems, and Signal Processing – Springer Publications